 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| SL74HCU04 Hex Unbuffered Inverters High-Performance Silicon-Gate CMOS The SL74HCU04 is identical in pinout to the 74LS04. This contain six independent unbuffered inverters. These inverters are well suited for use as oscillators, pulse shapers and in many other applications requiring a high-input impedance amplifier. This device is characterized for over wide temperature ranges to meet industry and ation over military specifications. * Low Power consumption characteristic of CMOS devices * Output drive capability: 10 LS TTL Loads Min. * Operating speed superior to LS TTL * Wide operating voltage range: 2.0 to 6.0 V * Low input current: 1.0 A Max. * Low quiescent current: 20A Max. * High noise immunity characteristic of CMOS * Diode protection on all inputs ORDERING INFORMATION SL74HCU04N Plastic SL74HCU04D SOIC TA = -55 to 125 C for all packages igh-Performance??Silicon-Gate LOGIC DIAGRAM FUNCTION TABLE Inputs A L H Output Y H L PIN 14 =VCC PIN 7 = GND SLS System Logic Semiconductor SL74HCU04 MAXIMUM RATINGS * Symbol VCC VIN VOUT IIN IOUT ICC PD Tstg TL * Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin DC Output Current, per Pin DC Supply Current, VCC and GND Pins Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) Value -0.5 to +7.0 -1.5 to VCC +1.5 -0.5 to VCC +0.5 20 25 50 750 500 -65 to +150 260 Unit V V V mA mA mA mW C C Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 10 mW/C from 65 to 125C SOIC Package: : - 7 mW/C from 65 to 125C RECOMMENDED OPERATING CONDITIONS Symbol VCC VIN, VOUT TA tr, t f Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage, Output Voltage (Referenced to GND) Operating Temperature, All Package Types Input Rise and Fall Time (Figure 1) VCC =2.0 V VCC =4.5 V VCC =6.0 V Min 2.0 0 -55 0 0 0 Max 6.0 VCC +125 1000 500 400 Unit V V C ns This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND(VIN or VOUT)VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V ). CC Unused outputs must be left open. SLS System Logic Semiconductor SL74HCU04 DC ELECTRICAL CHARACTERISTICS(Voltages Referenced to GND) VCC Symbol VIH Parameter Minimum HighLevel Input Voltage Maximum Low Level Input Voltage Minimum HighLevel Output Voltage VIN=VIH or VIL IOH = -20 A VIN=VIH or VIL IOH = -4 mA IOH = -5.2 mA VOL Maximum LowLevel Output Voltage VIN=VIH or VIL IOL = 20 A VIN=VIH or VIL IOL = 4 mA IOL = 5.2 mA IIN ICC Maximum Input Leakage Current Maximum Quiescent Supply Current (per Package) VIN=VCC or GND VIN=VCC or GND IOUT=0 A Test Conditions V 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0 6.0 6.0 Guaranteed Limit 25 C to -55C 1.7 3.6 4.8 0.3 0.8 1.1 1.8 4.0 5.5 3.86 5.36 0.2 0.5 0.5 0.32 0.32 0.1 2.0 85 C 1.7 3.6 4.8 0.3 0.8 1.1 1.8 4.0 5.5 3.76 5.26 0.2 0.5 0.5 0.37 0.37 1.0 20 125 C 1.7 3.6 4.8 0.3 0.8 1.1 1.8 4.0 5.5 3.7 5.2 0.2 0.5 0.5 0.4 0.4 1.0 40 A A V Unit V VIL V VOH V SLS System Logic Semiconductor SL74HCU04 AC ELECTRICAL CHARACTERISTICS(CL=50pF,Input t r=t f=6.0 ns) VCC Symbol tPLH, t PHL Parameter Maximum Propagation Delay, Input A to Output Y (Figures 1 and 2) Maximum Output Transition Time, Any Output (Figures 1 and 2) Maximum Input Capacitance V 2.0 4.5 6.0 2.0 4.5 6.0 Guaranteed Limit 25 C to -55C 80 16 14 75 15 13 10 85C 100 20 17 95 19 16 10 125C 120 24 20 110 22 19 10 Unit ns tTLH, t THL ns CIN pF Power Dissipation Capacitance (Per Inverter) CPD Used to determine the no-load dynamic power consumption: PD=CPDVCC2f+ICCVCC Typical @25C,VCC=5.0 V 15 pF Figure 1. Switching Waveforms * Includes all probe and jig capacitance Figure 2. Test Circuit SLS System Logic Semiconductor |
Price & Availability of SL74HCU04
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |